The command station is a PIC 16C84 based circuit which takes commands from a PC and outputs a DCC signal. The commands station has the following features. Now pay attention, 007...
There was an NRMA standard NMRA RP-9.2.? in progress which never made it. Some manufacturers have their own command sets. I have chosen to use my own as the requirements were very basic - most of the work is expected to be done by the PC front-end. The command set for the command station is small.
How's that for a small command set? There are a couple of other commands which are not required and will be dropped.
The system is a minimum implementation with almost all logic being placed on the PC front-end program. The micro-controller used is the PIC 16C84. This chip is easily available and cheap but has limited resources which precludes supporting any of the memory intensive features.

Circuit diagram in Postscript(47K)
A 16C84 running at 10 MHz interfaces directly to an RS-232 line. The 16C84 drives two L298 dual H-bridges through a few NOT gates. The diodes on the outputs protect the L298 outputs. The four transistors are driven by the sense outputs of the L298 and are used to sense a short circuit on any of the four tracks. The short circuit threshold is 2A. The outputs of the transistors are connected in a wired-or and go to one of the PIC input pins. The fifth transistor on the programming track detects the feedback pulse during programming and goes to another PIC input.
The RTCC on the PIC is set to interrupt every 53us. Although this results in a signal that is outside the limits for a command station set by the NMRA standard it is within limits for a decoder. This period was chosen to allow easy communications at 1200 baud. This may be fixed in future versions.
The serial port is serviced in the ISR by calling the serial ISR one in four interrupts. The ISR should take under 53us. There isn't a problem with the main routine not getting enough time as there is plenty of time in three out of four interrupts when the serial routine is not called. I barely managed to achieve this with a 10 MHz crystal.
The circuit is built on a 100mm x 90mm piece of veroboard. I underestimated the size and had a tough time fitting everything in. I haven't yet built a PCB for it but might do so once I have everything running - whatever that is. I have built only two channels out of the four. So only one L298 has been installed. The MJE 2955 transistor and the L298 have decent sized heatsinks. 5.08mm terminal connectors are used for the transformer connections and the track outputs. The serial connection uses a 3 pin SIL.
I picked up the case at the local electronics shop. It seems to be a case for an old 5 1/4" floppy drive. It is about 275mm(L) x 165(W) x 60mm(H). It has aluminium front and back plates. I used a toroidal transformer even though this is twice as expensive as a regular one as it has the required low profile. The transformer is rated at 18-0-18V 160VA. It is over-rated for the job but as it was the same cost as a 120 VA transformer, I ended up using it. Rather than describe the case layout or show drawings I decided to have a 3D representation of it in VRML.
One of the important features yet to be added to the command station is programming. With my new N scale layout and the imminent arrival of 4 mobile decoders, this has been taken up in earnest.
The philosophy of the DCC command station has been to keep the complexity of the command station at the minimum and put as much complexity and flexibility on the front-end as possible. Incorporating service mode functions will follow the same guideline.
Implementing Service Mode and its various addressing modes are discussed in detail elsewhere. To recap, the two main addressing modes are Direct CV and Paged CV. Implement Paged CV and Physical Register and Address Only will come with it. Address Only is supposed to be the first one to be implemented but with the need for a page reset sequence it is far from the simplest. Perhaps, it is more of a marketing tool. Direct CV is the most powerful as it offers bit level access. As it does not need the page preset sequence, it is also the simplest. Interestingly, the RP sets a priority of Address Only, either of Physical Register and Paged CV, the other remaining mode and lastly Direct CV.
Although Direct CV is not the preferred programming method, it is used here as it is relatively straight forward and is best suited to the philosophy of simple command station and complex PC front-end. I am hoping that most modern decoders can handle this type - the Lenz LE077XF does.
The two major high-level functions to be implemented are writing to a CV and reading from a CV. Reading from a CV is implemented as making guesses at the value of a CV bit by bit using verify bit packet commands.
The only time-critical part in a packet sequence is sending out the entire reset packet-exec command-reset packet sequence without intervening idle packets. The command station will receive the single exec packet in the sequence. It will then transmit out the correct command sequence incorporating the given exec packet.
The read operation can be implemented completely on the front-end side. This is in keeping with the philosophy of smart PC-dumb command station. The write and verify commands can be unified by specifying the no. of times a packet has to be transmitted. This allows both writes and verifies to be done with the same command. The write packet sequence will be executed by sending the same write packet again as part of the decoder recovery cycle rather than the reset packet. This will also support any future enhancements to implement other addressing modes solely on the PC.
An existing command(P) was originally implemented to send out packets only on the programming track. This command will now be appropriated for service mode. The format of the P command will now be as follows.
Px nn nn nn<CR> |
||||
| Where | ||||
x |
-> |
No, of times the data packet is sent(6 for verify, 12 for write) | ||
nn nn |
-> |
The data packet | ||
Sending out the P command will do the following.
Writing to a CV is trivial once the above functionality is implemented on the command station. To implement a read, a series of data packets are sent out from the front-end doing a bit by bit verify of the CV. A 0 value verify is done first. A 1 value verify follows if no ack is received. If both verifies return no ack, the read is aborted with an error. This procedure is repeated till all bits have been determined. This approach builds the smarts into the front-end and keep the command station simple.
Implementing this on the command station requires the following changes made to the software